In the manufacture of integrated circuitry, redundant circuit elements are typically provided in the event not all of the circuitry or components prove operable upon testing. Thus if some portion of the circuitry is inoperable, backup circuitry is available such that the chip is saleable. One manner of providing for such circuit redundancy provides antifuses and redundant circuit logic for activating such antifuses. An antifuse is a component which upon activation or "blowing" creates a short between two conductive elements.
Antifuses are similar in construction to capacitors, as evidenced by FIG. 1. There illustrated are portions of a semiconductor wafer 10 in process. The left or "A" portion of the FIG. 1 illustrates a capacitor construction, whereas the right or "B" portion illustrates an antifuse. More specifically, wafer fragment 10 is comprised of a bulk substrate 12, diffusion regions 14 and 16 and field oxide regions 18. An insulator layer 20 is provided over substrate 12, with contacts 22 and 24 being provided therethrough to diffusion regions 14 and 16, respectively. Referring specifically to the capacitor construction of the "A" portion, such is comprised of a patterned electrically conductive storage node 26, an intervening dielectric layer 28, and an overlying capacitor cell layer 30. Referring to the antifuse "B" side of FIG. 1, such is comprised of a lower conductive inner antifuse plate 30 and an outer antifuse plate 32. These are separated and electrically isolated from one another by an intervening antifuse dielectric element 34. Accordingly, a capacitor and antifuse are similar to one another in that two conductive elements are separated by dielectric material.
To "blow" the antifuse, a certain level of quanta of charge (Q.sub.BD) is passed through fuse dielectric 34 to cause a physical breakdown of intervening dielectric element 34. Such creates permanent electrically conductive paths between elements 32 and 30, thus forming a desired electrically conductive short.
It is desirable for antifuses to be able to be blow with short current pulses to speed programming. Such would be facilitated by high voltages. However, the maximum voltage to blow antifuses is limited by the diode and gate breakdown voltages of the periphery MOS circuitry. To speed programming for a fixed maximum voltage, it is desirable to have the fuses have a low Q.sub.BD and/or IV characteristics such that a high current level passes through the fuse for a given voltage. This can be accommodated by providing separate antifuse and capacitor constructions such that the material and/or thickness of the respective separating dielectric elements are optimized for desired capacitor or antifuse function. One significant drawback to this approach, however, is that considerably more processing steps are required than were it feasible to manufacture capacitors and antifuses during the same essential processing steps.
Accordingly, it would be desirable to develop methods which enable stacked capacitors and antifuses to be jointly developed in semiconductor wafer processing, and as well as to provide alternate antifuse constructions.